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The ESP32-S3 SoC, power and IoT versatility

The ESP32-S3 SoC is the new flagship of the manufacturer Espressif Systems, which comes to consolidate the power of the ESP32 family in terms of microcontrollers for IoT.

The ESP32-S3 offers an unprecedented level of power and versatility, providing a wide range of features and functionalities that make it an ideal choice for IoT projects, wearable devices, and embedded applications.

The ESP32-S3 comes equipped with a dual-core Xtensa LX7 RISC-V processor capable of reaching a clock speed of up to 240 MHz. In other words, we recover the dual-core that we had in the original ESP32, but which the S2 lacked.

In terms of memory, the ESP32-S3 has 384 KB ROM, 512 KB SRAM. That is, a memory capacity much higher than that of the S2, and similar to what we had in the original ESP32.


Regarding wireless connectivity, the ESP32-S3 retains Wi-Fi connectivity, which as we know is one of the outstanding features of all ESP32s. But it incorporates improvements such as supporting the new Wi-Fi 802.11b/g/n/ac standard.

In addition, the ESP32-S3 includes Bluetooth 5.0, a feature that we had lost in the S2. Very interesting for integration with other IoT devices and expands the possibilities of application development.

In terms of connectivity, we have the enormous amount of interfaces that we usually find in the ESP32 family. Among them, it has 45x GPIO, UART, SPI, I2C, I2S, and PWM. Look at the table at the end of the article because the list is huge.

On the other hand, the ESP32-S3 SoC includes several power saving modes, which allows optimizing power consumption according to the application requirements. It also has a dedicated Ultra Low Power (ULP) co-processor, which can handle specific low-power tasks.

Finally, the S3 maintains the same security features found in the S2, such as a hardware random number generator (RNG), support for AES and RSA cryptography, and a dedicated security unit (HSM) that protects keys and cryptographic operations.

Here are the main features of the ESP32-S3

CPU and memory

  • Xtensa® dual-core 32-bit LX7 microprocessor, up to 240 MHz
  • 384 KB ROM, 512 KB SRAM
  • 16 KB SRAM in RTC
  • 128-bit data bus and SIMD commands
  • SPI, Dual SPI, Quad SPI, Octal SPI, QPI and OP interfaces that allow connection to multiple flash and external RAM


  • 45 × programmable GPIOs
  • 2 × 12-bit SAR ADCs, up to 20 channels
  • 3 × UART, 4 × SPI, 2 × I2C, 2 × I2S, 1 × RMT (TX/RX)
  • 1 × LCD interface, 1 × DVP 8-bit ~16-bit camera interface
  • 1 × pulse counter
  • LED PWM controller, up to 8 channels
  • 1 × full-speed USB OTG
  • 1 × USB Serial/JTAG controller
  • 2 × MCPWM
  • 1 × SDIO host controller with 2 slots
  • 4 × 54-bit general-purpose timers
  • 1 × 52-bit system timer
  • 3 × watchdog timers
  • 1 × temperature sensor
  • 14 × touch sensing IOs


  • IEEE 802.11 b/g/n-compliant
  • Supports 20 MHz, 40 MHz bandwidth in 2.4 GHz band


  • Bluetooth LE: Bluetooth 5, Bluetooth mesh
  • High power mode (20 dBm, share the same PA with Wi-Fi)

Low Power Management

  • Power Management Unit with five power modes
  • Ultra-Low-Power (ULP) coprocessors:
  • ULP-RISC-V coprocessor
  • ULP-FSM coprocessor


  • Secure boot, Flash encryption
  • Cryptographic hardware acceleration, AES-128/192/25, RSA, Random Number Generator (RNG), HMAC, Digital signature