Sequential logic is digital electronics with memory. The output depends not only on the current inputs, but also on the previous state of the circuit.
In the previous article, we saw combinational circuits (gates, multiplexers). Their rule was simple: if you change the input, the output changes. It didn’t matter what happened 10 milliseconds ago. The circuit lived in an eternal present.
But computers need to remember. They need to store variables, count steps, or save a photo.
For this, sequential logic was born. The key here is feedback. If we take the output of a logic gate and connect it back to its input, we create a loop that can maintain a state indefinitely.
Today, we will look at the most basic memory cells: the latch and the flip-flop.
Latch vs Flip-Flop
| Feature | Latch | Flip-Flop |
|---|---|---|
| Synchronization | Asynchronous (or level-sensitive) | Synchronous (clocked) |
| When it changes | As soon as the input changes | Only on the clock edge |
| Primary use | Simple circuits, debouncing | CPUs, counters, registers |
| Stability | Low (sensitive to noise) | High (synchronized) |
The SR Latch (the basic memory)
The latch is the simplest memory circuit. It is built by cross-coupling two NOR or NAND gates. We will focus on the SR Latch (Set-Reset).
It has two inputs:
- S (Set): To “set” the memory to 1.
- R (Reset): To “clear” the memory to 0.
Operation
If you pulse S: The output Q is set to 1. Even if you release S, the output stays at 1. It has remembered!
If you pulse R: The output Q is set to 0. It stays at 0 even if you release R.
If you pulse nothing (S=0, R=0): The circuit maintains its previous state (memory).
The forbidden state: What happens if you pulse S and R at the same time? The gates fight each other, the output becomes unpredictable, and the chip heats up or oscillates. In a correct design, we must never activate both at the same time.
The Latch Problem: Temporal Chaos
The latch is level-sensitive. In a D latch with an enable signal, while the enable is active, changes on the input pass through to the output; when deactivated, it holds the last state.
In complex circuits with millions of gates, this is a disaster. Signals take different amounts of time to arrive (nanoseconds of difference). If latches change at different moments, the processor would go crazy.
We need a conductor. We need a clock.
The Clock and Edge-Triggering
To solve the chaos, we introduce a constant square wave signal called CLK (clock). And this is where the flip-flop comes in.
The fundamental difference between a latch and a flip-flop is when they accept data:
- Latch: It is transparent. If the clock is high, it lets everything through. It is bad for synchronization.
- Flip-flop: It only pays attention to the input at the exact instant the clock changes. This is called edge-triggering.
The D Flip-Flop (Data)
The D flip-flop is very common in registers and other sequential circuits. It solves the forbidden state problem of the SR by using a single data input (D).
Operation
It has one input D and a clock input CLK.
- We put a
1or a0on the D input. Nothing happens, the output doesn’t change. - The moment CLK makes a rising edge (goes from LOW to HIGH)…
- …the flip-flop copies whatever is on D and puts it on the output Q.
- The output Q stays frozen, ignoring changes on D, until the next rising edge.
This is what allows a processor to operate step-by-step (clock cycles). The entire system moves together to the rhythm of the clock’s tick-tock.
The JK Flip-Flop (The Universal)
The JK is an improved version of the SR.
- J acts as set.
- K acts as reset.
The improvement is that if you activate J and K at the same time, it doesn’t go crazy (like the SR). Instead, it toggles its previous state. If it was 0, it goes to 1, and vice versa. This makes it ideal for building counters.
Application: The Register
One flip-flop stores 1 bit. If we put 8 D flip-flops in parallel and connect all their clocks together, we have an 8-bit register (1 byte).
When the clock gives the signal, all 8 bits are stored simultaneously.
- This is how output ports on microcontrollers work (like
PORTD). - This is how RAM memory works (millions of flip-flops and capacitors).
